Posts

feature_image
Optimizing Hardware For FPGAs
If you’ve studied digital design, you have likely used a field-programmable gate array (FPGA) to implement custom circuits. This widespread use of FPGAs stems from their flexible and reconfigurable...
image
RTL Code is Weird: Part 1
Register-transfer-level (RTL) development is widely known to be considerably more difficult than developing with more common high-level languages. The primary reason for this increased difficulty lies...
feature_trimmed
It's Time to Rethink FPGA Compilation
While serving on the banquet panel at the 2024 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, I was asked “if you could start your career over, what would you work on?” My answer...
featured_image
RTL Pitfalls: Stop Initializing Signals, Start Testing Resets, and Use Assertions
In this article, we again explore the intricacies of register-transfer-level (RTL) coding, investigating several often-overlooked topics that frequently lead to pitfalls in design. We then discuss more...
fractal-199054_640
You Can (and Should) Write Recursive RTL: Part 2
After the positive reception of my initial post on recursive RTL, which sparked numerous insightful discussions, I’m excited to present Part 2. In this installment, I’ll delve into addressing...
recursion_feature
You Can (and Should) Write Recursive RTL Code
Recursion, a fundamental concept in both software engineering and mathematics, offers powerful problem-solving capabilities by defining a problem in terms of itself. Yet, within the realm of register-transfer...
feature_wes
Crafting Clean Reset Logic
Despite reset logic not being the most exciting topic, I’ve been excited to write this article for some time, especially since this is one of the topics I never managed to fit into my lectures at...
Timing Optimization featured
Timing Optimization Tutorial
If you only studied digital design in college, there’s a good chance you don’t have much experience with timing analysis, optimization, and closure. Most digital-design classes, especially...
vhdl_sv_small
VHDL and SystemVerilog Tutorials
If you are learning RTL coding, looking for a useful language reference, or if you just want to see my thoughts on how to write RTL code, I would highly recommend my following two GitHub repositories: SystemVerilog...
circuit-board-6522546_1920
Design the Circuit, then Write the Code
Greg Stitt. Design the Circuit, then Write the Code. StittHub (Jan. 2024). https://stitt-hub.com/design-the-circuit-then-write-the-code/.(Click Here to Copy BibTeX) Target audience: beginning/intermediate...
1 2